Ultra-Thinned Individual SOI Die ACF FC Bonded on Rigid and Flex PCB

S. Stoukatch, N. André, F. Dupont, Jean-Michel Redouté, D. Flandre
{"title":"Ultra-Thinned Individual SOI Die ACF FC Bonded on Rigid and Flex PCB","authors":"S. Stoukatch, N. André, F. Dupont, Jean-Michel Redouté, D. Flandre","doi":"10.23919/empc53418.2021.9584947","DOIUrl":null,"url":null,"abstract":"We have developed a straightforward die-level thinning process suitable for Silicon-On-Insulator (SOI) dies. The process has been demonstrated on SOI CMOS die assembled on rigid and flexible PCBs using previously-developed anisotropic conductive adhesive flip-chip method. Unlike standard wafer-level thinning processes, in the demonstrated process the full thickness SOI die is directly mounted on PCB and after that thinned. The demonstrated process is simple and robust; it comprises fewer process steps compared to conventional die thinning process. The ultra-thinning process has no effects on the assembly integrity and device performance.","PeriodicalId":348887,"journal":{"name":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/empc53418.2021.9584947","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

We have developed a straightforward die-level thinning process suitable for Silicon-On-Insulator (SOI) dies. The process has been demonstrated on SOI CMOS die assembled on rigid and flexible PCBs using previously-developed anisotropic conductive adhesive flip-chip method. Unlike standard wafer-level thinning processes, in the demonstrated process the full thickness SOI die is directly mounted on PCB and after that thinned. The demonstrated process is simple and robust; it comprises fewer process steps compared to conventional die thinning process. The ultra-thinning process has no effects on the assembly integrity and device performance.
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超薄单个SOI芯片ACF FC粘接在刚性和柔性PCB上
我们已经开发了一种适用于绝缘体上硅(SOI)模具的直接模具级减薄工艺。该工艺已在采用先前开发的各向异性导电胶倒装芯片方法在刚性和柔性pcb上组装的SOI CMOS芯片上进行了演示。与标准的晶圆级减薄工艺不同,在演示的工艺中,全厚度SOI芯片直接安装在PCB上,然后再减薄。所演示的过程简单,鲁棒性强;与传统的模具减薄工艺相比,它包括更少的工艺步骤。超薄工艺对装配完整性和器件性能没有影响。
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