{"title":"A substructure method for strip level warpage simulation of a power module in assembly process","authors":"Jianghai Gu, L. Liang, Y. Liu","doi":"10.1109/ESIME.2011.5765806","DOIUrl":null,"url":null,"abstract":"A substructural method is developed to simulate the strip level warpage of a power module in assembly process. The comparison between substructure and non-substructure methods is presented and discussed. Parametric design of experimental (DoE) study on low side (LS) and high side (HS) die thickness, epoxy mold compound (EMC) thicknenss, as well the Young's modulus Ez of prepreg and Young's modulus of EMC is conducted in the simulation.","PeriodicalId":115489,"journal":{"name":"2011 12th Intl. Conf. on Thermal, Mechanical & Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 12th Intl. Conf. on Thermal, Mechanical & Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESIME.2011.5765806","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A substructural method is developed to simulate the strip level warpage of a power module in assembly process. The comparison between substructure and non-substructure methods is presented and discussed. Parametric design of experimental (DoE) study on low side (LS) and high side (HS) die thickness, epoxy mold compound (EMC) thicknenss, as well the Young's modulus Ez of prepreg and Young's modulus of EMC is conducted in the simulation.
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