J. Guy, G. Molas, P. Blaise, C. Carabasse, M. Bernard, A. Roule, G. Carval, Veronique Sousa, H. Grampeix, V. Delaye, A. Toffoli, J. Cluzel, P. Brianceau, O. Pollet, V. Balan, S. Barraud, O. Cueto, Gérard Ghibaudo, F. Clermidy, B. D. Salvo, L. Perniola
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引用次数: 29
Abstract
In this paper, we deeply investigate for the 1st time at our knowledge the impact of the CBRAM memory stack on the Forming, SET and RESET operations. Kinetic Monte Carlo simulations, based on inputs from ab-initio calculations and taking into account ionic hopping and chemical reaction dynamics are used to analyse experimental results obtained on decananometric devices. We propose guidelines to optimize the CBRAM stack, targeting Forming voltage reduction, improved trade-off between SET speed and disturb immunity (time voltage dilemma) and window margin increase (RESET efficiency).
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