Pessimism reduction in static timing analysis using interdependent setup and hold times

Abstract

A methodology is proposed for interdependent setup time and hold time characterization of sequential circuits. Integrating the methodology into an industrial sign-off static timing analysis tool is described. The proposed methodology prevents optimism and reduces unnecessary pessimism, both of which exist due to independent characterization. Furthermore, the tradeoff between interdependent setup and hold times is exploited to significantly reduce slack violations. These benefits are validated using industrial circuits and tools