J. Pétry, G. Boccardi, R. Singanamalla, C.S. Liu, K. Xiong, P. Escanes, J. Huguenin, J. Tseng, L. Van Nimwegen, F. Voogt, C. Bulle-lieuwma, M. Muller
{"title":"A VFB tunable Single Metal Single Dielectric approach using As I/I into TiN/HfO2 for 32nm node and beyond","authors":"J. Pétry, G. Boccardi, R. Singanamalla, C.S. Liu, K. Xiong, P. Escanes, J. Huguenin, J. Tseng, L. Van Nimwegen, F. Voogt, C. Bulle-lieuwma, M. Muller","doi":"10.1109/VTSA.2009.5159289","DOIUrl":null,"url":null,"abstract":"Easily integrable cost effective gate first Single Metal Single Dielectric (SMSD) solution based on As implantation into TiN/HfO2 with ∼ 1 nm EOT is presented. A consistent n-type shift of 250 mV down to 35 nm Lg is obtained by As I/I compared to the reference stack. Symmetrical threshold voltages (∼ ±0.5 V) are met for the bulk planar devices using this technique, which would corresponds to low-VT (±0.2V) target for the FD FETs. The possible counter-doping effects were evaluated electrically and physically with backside SIMS. It was found to be negligible implying negligible concentration of As in the channel region. As I/I technique opens up possibility of multiple VT tuning without adding any process complexity.","PeriodicalId":309622,"journal":{"name":"2009 International Symposium on VLSI Technology, Systems, and Applications","volume":"54 62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Technology, Systems, and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTSA.2009.5159289","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Easily integrable cost effective gate first Single Metal Single Dielectric (SMSD) solution based on As implantation into TiN/HfO2 with ∼ 1 nm EOT is presented. A consistent n-type shift of 250 mV down to 35 nm Lg is obtained by As I/I compared to the reference stack. Symmetrical threshold voltages (∼ ±0.5 V) are met for the bulk planar devices using this technique, which would corresponds to low-VT (±0.2V) target for the FD FETs. The possible counter-doping effects were evaluated electrically and physically with backside SIMS. It was found to be negligible implying negligible concentration of As in the channel region. As I/I technique opens up possibility of multiple VT tuning without adding any process complexity.