F. Vecchi, S. Bozzola, M. Pozzoni, D. Guermandi, E. Temporiti, M. Repossi, U. Decanis, A. Mazzanti, F. Svelto
{"title":"A 60GHz receiver with 13GHz bandwidth for Gbit/s wireless links in 65nm CMOS","authors":"F. Vecchi, S. Bozzola, M. Pozzoni, D. Guermandi, E. Temporiti, M. Repossi, U. Decanis, A. Mazzanti, F. Svelto","doi":"10.1109/ICICDT.2010.5510248","DOIUrl":null,"url":null,"abstract":"This paper presents a wide-band fully integrated receiver for Gbit/s connectivity at mm-waves comprising LNA, RF mixer, quadrature IF mixers, local oscillator (LO), in 65 nm CMOS. The architecture choice is key to meet LO requirements at low power dissipation. We have selected a sliding IF architecture, where the IF frequency, set to 1/3 the RF frequency, slides according to the received frequency. The VCO at 2/3 the RF frequency provides the reference for the first down-conversion and drives two injection locked dividers delivering LO signals for quadrature IF mixing. A Phase Noise of -115 dBc/Hz @ 10 MHz offset from an equivalent 60GHz carrier is achieved with 12.6% frequency tuning range. Coupled interstage resonators are introduced in the low-noise amplifier to extend considerably the gain bandwidth product, leading to more than 13GHz bandwidth with 26dB LNA gain. Selection of the architecture and design of building blocks are discussed in details. Realized prototypes of the receiver show a conversion gain of 35dB, 13GHz RF input bandwidth and noise figure below 6dB with a power dissipation, including LO generation, of 75mW only.","PeriodicalId":187361,"journal":{"name":"2010 IEEE International Conference on Integrated Circuit Design and Technology","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Conference on Integrated Circuit Design and Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2010.5510248","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents a wide-band fully integrated receiver for Gbit/s connectivity at mm-waves comprising LNA, RF mixer, quadrature IF mixers, local oscillator (LO), in 65 nm CMOS. The architecture choice is key to meet LO requirements at low power dissipation. We have selected a sliding IF architecture, where the IF frequency, set to 1/3 the RF frequency, slides according to the received frequency. The VCO at 2/3 the RF frequency provides the reference for the first down-conversion and drives two injection locked dividers delivering LO signals for quadrature IF mixing. A Phase Noise of -115 dBc/Hz @ 10 MHz offset from an equivalent 60GHz carrier is achieved with 12.6% frequency tuning range. Coupled interstage resonators are introduced in the low-noise amplifier to extend considerably the gain bandwidth product, leading to more than 13GHz bandwidth with 26dB LNA gain. Selection of the architecture and design of building blocks are discussed in details. Realized prototypes of the receiver show a conversion gain of 35dB, 13GHz RF input bandwidth and noise figure below 6dB with a power dissipation, including LO generation, of 75mW only.