{"title":"Progress on single-electron transistors","authors":"X. Jehl, M. Sanquer","doi":"10.1109/ICICDT.2010.5510261","DOIUrl":null,"url":null,"abstract":"Large scale production of single-electron transistors (SETs) is now possible with a standard fully-depleted SOI process. Although the operating temperature is limited to approximately 10 K for now, this opens new opportunities for implementing on-chip hybrid designs combining the benefits of Coulomb blockade with regular FET-based electronics. Moreover, the continuous shrinking of CMOS devices tends to bridge the gap between FETs and SETs, because of a necessary compromise between switching energy and switching speed. Devices designed for very low power applications will naturally feature Coulomb blockade at moderate temperature, as a result of very small dimensions and underlapped geometry. A promising outcome is the possibility to drive such devices at high frequency, as embedded FET-based electronics can be designed in very close vicinity of the SET. In parallel with our mainstream microelectronics approach, several groups have recently made significant advances towards high temperature (above 77 K) silicon based SETs. In this article we summarize the basic characteristics and behaviour of our MOS-SET design, its charge sensitivity and its remarkable long term stability and the coupling between several MOS-SETs associated in series.","PeriodicalId":187361,"journal":{"name":"2010 IEEE International Conference on Integrated Circuit Design and Technology","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Conference on Integrated Circuit Design and Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2010.5510261","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Large scale production of single-electron transistors (SETs) is now possible with a standard fully-depleted SOI process. Although the operating temperature is limited to approximately 10 K for now, this opens new opportunities for implementing on-chip hybrid designs combining the benefits of Coulomb blockade with regular FET-based electronics. Moreover, the continuous shrinking of CMOS devices tends to bridge the gap between FETs and SETs, because of a necessary compromise between switching energy and switching speed. Devices designed for very low power applications will naturally feature Coulomb blockade at moderate temperature, as a result of very small dimensions and underlapped geometry. A promising outcome is the possibility to drive such devices at high frequency, as embedded FET-based electronics can be designed in very close vicinity of the SET. In parallel with our mainstream microelectronics approach, several groups have recently made significant advances towards high temperature (above 77 K) silicon based SETs. In this article we summarize the basic characteristics and behaviour of our MOS-SET design, its charge sensitivity and its remarkable long term stability and the coupling between several MOS-SETs associated in series.