G. Molas, J. Colonna, R. Kies, D. Belhachemi, M. Bocquet, M. Gely, V. Vidal, P. Brianceau, L. Vandroux, G. Ghibaudo, B. De Salvo
{"title":"Investigation of charge-trap memories with AlN based band engineered storage layers","authors":"G. Molas, J. Colonna, R. Kies, D. Belhachemi, M. Bocquet, M. Gely, V. Vidal, P. Brianceau, L. Vandroux, G. Ghibaudo, B. De Salvo","doi":"10.1109/IMW.2010.5488309","DOIUrl":null,"url":null,"abstract":"This paper presents an in-depth investigation of the electrical properties of charge trap memories with AlN based storage layers. The memory performance and reliability are studied in details and compared with the ones of a reference device using standard Si<sub>3</sub>N<sub>4</sub> as storage layer. An engineered charge trapping layer is also proposed, made by an AlN/Si<sub>3</sub>N<sub>4</sub> double layer, which shows reduced program/erase voltages, combined with 10<sup>6</sup> excellent endurance and good retention (ΔV<sub>T</sub>>5V after 10 years at 125°C).","PeriodicalId":149628,"journal":{"name":"2010 IEEE International Memory Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Memory Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW.2010.5488309","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
This paper presents an in-depth investigation of the electrical properties of charge trap memories with AlN based storage layers. The memory performance and reliability are studied in details and compared with the ones of a reference device using standard Si3N4 as storage layer. An engineered charge trapping layer is also proposed, made by an AlN/Si3N4 double layer, which shows reduced program/erase voltages, combined with 106 excellent endurance and good retention (ΔVT>5V after 10 years at 125°C).