3.1 A 28Gb/s multi-standard serial-link transceiver for backplane applications in 28nm CMOS

Bo Zhang, Karapet Khanoyan, H. Hatamkhani, Haitao Tong, Kangmin Hu, S. Fallahi, K. Vakilian, A. Brewster
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引用次数: 19

Abstract

Rapid internet traffic growth has fueled the demand for bandwidth in metro networks and data centers and pushed the serial link data rate into 25Gb/s territory, populated by such electrical interface as OIF CEI-25G, CEI-28G [1], IEEE 802.3bj 100G-KR4. To cope with severe channel impairments at 25Gb/s with up to 30dB loss at Nyquist, a feed-forward equalizer (FFE)/decision feedback equalizer (DFE) based transceiver without power-hungry analog-to-digital converter (ADC) provides robust performance. This work presents a low-power and area-efficient transceiver that employs a 14-tap adaptive DFE at the receiver (RX) and a 5-tap FFE at the transmitter (TX) for multi-standard applications up to 28Gb/s in 28nm CMOS.
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3.1用于28nm CMOS背板应用的28Gb/s多标准串行链路收发器
快速增长的互联网流量推动了城域网络和数据中心对带宽的需求,并推动串行链路数据速率达到25Gb/s,由OIF CEI-25G、CEI-28G[1]、IEEE 802.3bj 100G-KR4等电接口填充。为了应对Nyquist在25Gb/s和高达30dB损耗下的严重信道损伤,基于前馈均衡器(FFE)/决策反馈均衡器(DFE)的收发器没有耗电的模数转换器(ADC),提供了强大的性能。本研究提出了一种低功耗和面积高效的收发器,该收发器在接收端(RX)采用14分接自适应DFE,在发送端(TX)采用5分接FFE,适用于28Gb/s的多标准应用。
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