A new concept for InP-HBT fabrication process

M. le Pallec, R. Bauknecht, M. Bitter, H. Melchior
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Abstract

A new technology for submicron InP HBT-based integrated circuit fabrication has been investigated. The new concept takes advantage of the crystal plane dependency of InP and InGaAs wet chemical etching profiles combined with an optimized planarization technique. High-speed transistors with a simplified processing in a reduced fabrication time are obtained for the InP-HBT technology.
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InP-HBT制造工艺的新概念
研究了一种亚微米InP基hpt集成电路的新工艺。新概念利用了InP和InGaAs湿化学蚀刻剖面的晶体平面依赖性,并结合了优化的平面化技术。采用InP-HBT技术,可在较短的制造时间内获得工艺简化的高速晶体管。
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InP-based thermionic coolers Length dependence of quantized conductance in etched GaAs/AlGaAs quantum wires Contacting of buried InP-based layers by epitaxial overgrowth over patterned tungsten features Monolithically integrated 40-Gb/s InP/InGaAs PIN/HBT optical receiver module Optimizing InP HBT technology for 50 GHz clock-rate MSI circuits
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