Extended dynamic voltage scaling for low power design

Abstract

Dynamic voltage scaling (DVS) is a popular approach for energy reduction of integrated circuits. Current processors that use DVS typically have an operating voltage range from full to half of the maximum V/sub dd/. However, it is possible to construct designs that operate over a much larger voltage range: from full Vdd to subthreshold voltages. This possibility raises the question of whether a larger voltage range improves the energy efficiency of DVS. First, from a theoretical point of view, we show that for subthreshold supply voltages leakage energy becomes dominant, making "just in time completion" energy inefficient. We derive an analytical model for the minimum energy optimal voltage and study its trends with technology scaling. Second, we compare several different low-power approaches including MTCMOS, standard DVS and extended DVS to subthreshold operation. Study of real applications on commercial processor shows that extended DVS has the best energy efficiency. Therefore, we conclude that extending the voltage range below V/sub dd//2 will improve the energy efficiency for most processor designs.