Extraction of thermal resistance for fully-depleted SOI MOSFETs

T. Lee, R. Fox
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引用次数: 6

Abstract

This paper presents a convenient and direct method for extracting thermal impedance for fully-depleted SOI MOSFETs. The results are consistent with thermal resistance calculations using a physical model. Demonstration of the use of a Thermal Impedance Pre-Processor applied to an electrothermal circuit model in the simulator Saber to predict thermal transient response is also provided along with measurement data.
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完全耗尽SOI mosfet的热阻提取
本文提出了一种方便直接的方法来提取完全耗尽SOI mosfet的热阻抗。结果与用物理模型计算的热阻结果一致。演示了将热阻抗预处理器应用于仿真器Saber中的电热电路模型以预测热瞬态响应,并提供了测量数据。
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Analytical threshold voltage model for short channel n/sup +/-p/sup +/ double-gate SOI MOSFETs Front and back gate interface-trap generation due to hot carrier stress in fully depleted SOI/MOSFETs SOI material characterization using optical second harmonic generation Minimum parasitic resistance for ultra-thin SOI MOSFET with high-permittivity gate insulator performed by lateral contact structure Transient effects in floating body SOI NMOSFETs
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