Memory yield and lifetime estimation considering aging errors

Abstract

A memory is a high-density device with low cost per bit. Denser memories are likely to contain more errors. Replacing such errors requires repair schemes with good cells for the yield enhancement of a memory. The yield of a memory, therefore, should be calculated considering the repair scheme that a memory system has incorporated. In this paper, we propose a methodology that estimates the yield and the lifetime of a memory with various failure mechanisms and repair schemes of a memory. In a case study of aging errors in a 2Gb DDR3 SDRAM, we demonstrate the feasibility of our yield and lifetime estimation with various redundancy combinations.