22.3 A 4-to-11GHz injection-locked quarter-rate clocking for an adaptive 153fJ/b optical receiver in 28nm FDSOI CMOS

Abstract

Modern SoC systems impose stringent requirements on on-chip clock generation and distribution. Ring-oscillator (RO) based injection-locked (IL) clocking has been used in the past to provide a low-power, low-area and low-jitter solution. Ring-based injection-locked oscillators (ILO) can also be used to generate quadrature phases from a reference clock without frequency division, which is desirable for half-rate and quarter-rate CDR. However, ILO inherently has a small locking range making it less suitable for wideband applications. In addition, drift in the free-running frequency due to PVT variations may lead to poor jitter performance and locking failures. Adding a PLL to an ILO provides frequency tracking. However, PLL-aided techniques have second-order characteristics that lead to jitter peaking. They also add design complexity and power consumption . We present a frequency-tracking method that exploits the dynamics of IL in a quadrature RO to increase the effective locking range. This quadrature locked loop (QLL) is used to generate accurate clock phases for a 4-channel optical receiver using a forwarded clock at quarter-rate. The QLL drives an ILO at each channel without any repeaters for local quadrature clock generation. Each local ILO has deskew capability for phase alignment. The receiver maintains per-bit energy consumption across wide data-rates (16 to 32Gb/s) by adaptive body biasing (BB) in a 28nm FDSOI technology.