Power-switch gate-oxide breakdown tolerance techniques for power-gated SRAM

Abstract

The gate-oxide breakdowns (BD) of the power-switches have severe and even detrimental effects on the margin, stability, and performance of the power-gated SRAM. This paper proposes and evaluates several techniques to mitigate the power-switch gate-oxide BD, including adding a gate series resistance to the power switch, dual threshold voltage power switch, thick gate-oxide power switch, and dual gateoxide thickness power switch. It is shown that dual gate-oxide thickness power switch improves the time-to-dielectric-breakdown of the power switch while maintaining the performance without side effect.