A 6 Ghz input bandwidth 2 Vpp-diff input range 6.4 GS/s track-and-hold circuit in 0.25 μm BiCMOS

M. Buck, M. Grözing, M. Berroth, M. Epp, S. Chartier
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引用次数: 11

Abstract

A 0.25 μm SiGe-BiCMOS 6.4 GS/s track-and-hold circuit with an input bandwidth exceeding 6 GHz and up to 2 Vpp-diff input voltage range applies a hold-mode muted preamplifier that reduces signal feedthrough and improves linearity. The track-and-hold circuit provides more than 59 dBc hold-mode SFDR3 for 1.0 to 6.0 GHz 1 Vpp-diff input signals at 6.4 GS/s, outperforming the best commercial THs operated at only 4 GS/s.
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在0.25 μm BiCMOS中设计了一种6ghz输入带宽2 vpp差分输入范围6.4 GS/s的跟踪保持电路
0.25 μm SiGe-BiCMOS 6.4 GS/s跟踪保持电路,输入带宽超过6ghz,输入电压范围高达2vpp -diff,采用保持模式静音前置放大器,减少信号馈通,提高线性度。跟踪保持电路为1.0至6.0 GHz 1 vpp差分输入信号提供超过59 dBc的保持模式SFDR3,速度为6.4 GS/s,优于最佳的商用THs,速度仅为4 GS/s。
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