{"title":"Stochastic Analysis Method for Tree-Type PDNs on Mixed-Signal PCB","authors":"M. Mehri","doi":"10.1109/SPI52361.2021.9505194","DOIUrl":null,"url":null,"abstract":"In this paper, a stochastic analysis method is proposed for extraction and evaluation of power distribution map (PDM) in system printed circuit board (PCB). This is conducted based on some system-level information including placement and routing geometry, power distribution network (PDN), component package parasitic, and voltage regulator module (VRM). A simple model for power consumption of major constituent blocks of the system, is analytically extracted based on circuit parameters. Verifications are conducted by a specific designed and fabricated board. The proposed approach can be considered as a preliminary verification step of the PCB design flow. In addition, it helps to have a basic consideration about system layout performance.","PeriodicalId":440368,"journal":{"name":"2021 IEEE 25th Workshop on Signal and Power Integrity (SPI)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 25th Workshop on Signal and Power Integrity (SPI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPI52361.2021.9505194","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, a stochastic analysis method is proposed for extraction and evaluation of power distribution map (PDM) in system printed circuit board (PCB). This is conducted based on some system-level information including placement and routing geometry, power distribution network (PDN), component package parasitic, and voltage regulator module (VRM). A simple model for power consumption of major constituent blocks of the system, is analytically extracted based on circuit parameters. Verifications are conducted by a specific designed and fabricated board. The proposed approach can be considered as a preliminary verification step of the PCB design flow. In addition, it helps to have a basic consideration about system layout performance.