Computational modelling of cylindrical-ferroelectric-dual metal-nanowire field effect transistor (C-FE-DM-NW FET) using landau equation for gate leakage minimization

IF 2.7 Q2 PHYSICS, CONDENSED MATTER Micro and Nanostructures Pub Date : 2024-04-29 DOI:10.1016/j.micrna.2024.207851
Aapurva Kaul, Snehlata Yadav, Sonam Rewari, Deva Nand
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Abstract

In order to address and resolve the significant problem of gate-induced drain leakage (GIDL) current and enhance device reliability, band-to-band tunnelling (BTBT), and OFF-state leakages, a computational model of a cylindrical-ferroelectric-dual-metal-nanowire-field effect transistor (C-FE-DM-NW-FET) has been proposed in this manuscript. The proffered structure is a symmetric gate structure with ferroelectric layer sandwiched between the gate terminal and oxide layer which reduces the BTBT which in term reduces the OFF-state leakage hence making the device definitive for low power applications. In this manuscript, there has been a reduction in the leakage current by a magnitude of 104 times in 50 nm and 107 times in 60 nm channel length which translates to a reduction in gate leakage (IGIDL) of more than 100 % in C-FE-NW-FET over C-NW FET. To analyze the Electric Field, Surface Potential, and IGIDL with the proper boundary conditions, the 2D Poisson's equation is solved analytically with Landau-Khalatnikov (LK) equation. The analytical findings are quite similar to the simulated outcomes.

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利用栅极漏电流最小化的朗道方程对圆柱形铁电双金属纳米线场效应晶体管(C-FE-DM-NW FET)进行计算建模
为了解决栅极诱导漏电流(GIDL)这一重大问题,并提高器件可靠性、带对带隧穿(BTBT)和关态漏电,本手稿提出了圆柱形铁电双金属纳米线场效应晶体管(C-FE-DM-NW-FET)的计算模型。所提出的结构是一种对称栅极结构,栅极端子和氧化层之间夹有铁电层,这就降低了 BTBT,从而减少了关态漏电,使该器件适用于低功耗应用。在本手稿中,50 nm 和 60 nm 沟道长度的漏电流分别减少了 104 倍和 107 倍,这意味着 C-FE-NW-FET 比 C-NW FET 的栅极漏电流(IGIDL)减少了 100% 以上。为了在适当的边界条件下分析电场、表面电势和 IGIDL,利用 Landau-Khalatnikov (LK) 方程对二维泊松方程进行了分析求解。分析结果与模拟结果非常相似。
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