{"title":"Symbolic-functional representation inference for gate-level power estimation","authors":"Zejia Lyu, Jizhong Shen","doi":"10.1016/j.mejo.2024.106443","DOIUrl":null,"url":null,"abstract":"<div><div>We propose SyfriPow, a method for estimating the vectorless average power consumption of gate-level circuits using sparse symbolic matrix inference. SyfriPow employs a probability-based approach, utilizing signal and transition probability to assess power consumption across various nodes. We present a symbolic representation probabilistic model for reasoning signal and transition probability through polynomial-based symbolic inference, incorporating a polynomial approximation strategy for spatial correlations and functional mapping for quick secondary computation. The model is sparsified with GPU accelerated polynomial sparse arithmetic engine, achieving sparse symbolic inference and sparse functional mapping which are implemented on Pytorch. Experiments demonstrate that SyfriPow achieves node-level probabilistic accuracy and significantly improves power accuracy compared to industrial software and academic algorithms, with an average power error of less than 4%. SFM efficiently analyzes large-scale circuits, processing up to 250k nodes in 100 s. SyfriPow can also function as an independent logic prediction engine, surpassing state-of-the-art algorithms in accuracy and speed.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124001474","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
We propose SyfriPow, a method for estimating the vectorless average power consumption of gate-level circuits using sparse symbolic matrix inference. SyfriPow employs a probability-based approach, utilizing signal and transition probability to assess power consumption across various nodes. We present a symbolic representation probabilistic model for reasoning signal and transition probability through polynomial-based symbolic inference, incorporating a polynomial approximation strategy for spatial correlations and functional mapping for quick secondary computation. The model is sparsified with GPU accelerated polynomial sparse arithmetic engine, achieving sparse symbolic inference and sparse functional mapping which are implemented on Pytorch. Experiments demonstrate that SyfriPow achieves node-level probabilistic accuracy and significantly improves power accuracy compared to industrial software and academic algorithms, with an average power error of less than 4%. SFM efficiently analyzes large-scale circuits, processing up to 250k nodes in 100 s. SyfriPow can also function as an independent logic prediction engine, surpassing state-of-the-art algorithms in accuracy and speed.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.