Signal Integrity of Submicron InFO Heterogeneous Integration for High Performance Computing Applications

Abstract

Heterogeneous integration has attracted much attention for high performance computing (HPC) since artificial intelligence (AI) accelerators surged. The technologies for heterogeneous integration, such as silicon interposer (2.5D), fan-out wafer-level-packaging (FOWLP), and organic substrate, have been proposed to integrate logic-logic or logic-HBM chips in the AI system for performance and cost benefits. However, the tremendous data flow in 5G era requires higher data rate and bandwidth for the extensive die-to-die communication. Therefore, a BEOL-scale re-distributed layer (RDL) technology should be developed to satisfy the requirements. In this paper, a novel ultra-high-density InFO (InFO_UHD) technology with submicron RDL is developed to provide high interconnect density and bandwidth for logic-logic system. The bandwidth density can achieve record high 10 Tbps/mm at line width and spacing (L/S) of 0.8/0.8 um and length of 500 um, for a logic-logic system using simplified IO driver. Using the technology in logic-memory system, we found that the scaling of RDL thickness, L/S, and dielectric thickness can mitigate ring-back problems in the eye diagram of organic substrate. Given HBM2 specification, the bandwidth density can achieve more than 0.4 Tbps/mm from dramatically improved signal integrity. Finally, power efficiency, in the metric of energy per bit, of the interconnect technology under simplified IO driver and HBM2 driver condition was calculated and compared with other technology, respectively.