Y. Shuto, S. Yamamoto, H. Sukegawa, Z. Wen, R. Nakane, S. Mitani, Masaaki Tanaka, K. Inomata, S. Sugahara
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引用次数: 16
Abstract
The design and performance of pseudo-spin-MOSFETs (PS-MOSFETs) using nano-CMOS devices were computationally investigated. The operations of a PS-MOSFET with current-induced magnetization switching were also experimentally demonstrated by the hybrid integration of a vendor-made MOSFET and our-developed spin-transfer-torque magnetic tunnel junction. The nonvolatile SRAM and delay flip-flop applications of PS-MOSFETs were also examined.
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