Soft error in FPGA-implemented asynchronous circuits

W. Kuang, Yu Bai
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引用次数: 1

Abstract

In this paper, we investigate the mechanism of soft error generation and propagation in asynchronous circuits which are implemented on FPGAs. The effects of the soft errors on Quasi-delay-insensitive (QDI) asynchronous circuits are analyzed. The results show that it is much easier to detect the soft error in asynchronous circuits implemented on FPGAs so that FPGAs can be reprogrammed, compared with traditional synchronous circuits.
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fpga实现异步电路中的软误差
本文研究了在fpga上实现异步电路中的软误差产生和传播机制。分析了软误差对准延迟不敏感(QDI)异步电路的影响。结果表明,与传统的同步电路相比,用fpga实现的异步电路更容易检测出软误差,从而使fpga可以重新编程。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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Using partial reconfigurability to aid debugging of FPGA designs Architecture driven memory allocation for FPGA based real-time video processing systems Soft error in FPGA-implemented asynchronous circuits Experiences applying framework-based functional verification to a design for programmable logic A FPGA IEEE-754-2008 decimal64 Floating-Point adder/subtractor
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