50 nm vertical replacement-gate (VRG) nMOSFETs with ALD HfO/sub 2/ and Al/sub 2/O/sub 3/ gate dielectrics

J. Hergenrother, G. Wilk, T. Nigam, F. Klemens, D. Monroe, P. Silverman, T. Sorsch, B. Busch, M. Green, M. R. Baker, T. Boone, M. Bude, N. A. Ciampa, E. Ferry, A. Fiory, S. Hillenius, D. Jacobson, R.W. Johnson, P. Kalavade, R. Keller, C. King, A. Kornblit, H. Krautter, J.T.-C. Lee, W. Mansfield, J. Miner, M. Morris, S. Oh, J. Rosamilia, B. Sapjeta, K. Short, K. Steiner, D. Muller, P. Voyles, J. Grazul, E. Shero, M. Givens, C. Pomarede, M. Mazanec, C. Werkhoven
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引用次数: 10

Abstract

We have integrated HfO/sub 2/ and Al/sub 2/O/sub 3/ gate dielectrics grown by atomic layer chemical vapor deposition (ALD) with poly-Si gate electrodes in the vertical replacement-gate (VRG) MOSFET geometry. These transistors are among the first reported with ALD HfO/sub 2/ gate dielectrics, and have HfO/sub 2/ target equivalent oxide thicknesses (tEOT's) down to 13 /spl Aring/. The poly-crystalline HfO/sub 2/ films in these VRG nMOSFETs exhibit extremely low gate leakage (GL) current densities of J/sub G/ /spl sim/ 10/sup -7/ A/cm/sup 2/ at V/sub G/-V/sub T,Long/ = 0.6 V for 15 /spl Aring/ tEOT devices. This indicates that amorphous gate dielectrics may not be necessary to meet GL requirements. HfO/sub 2/ devices with 50 nm gate length L/sub G/ exhibit drive currents [normalized by the coded width W/sub C/] of 490 /spl mu/A//spl mu/m for 1 V operation (overdrive V/sub GS/-V/sub T/ = 0.6 V) with good short-channel performance. These results demonstrate that ALD is compatible with the demanding VRG geometry, thereby illustrating that it should be well-suited to essentially any novel device structure built with Si-compatible materials.
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采用ALD HfO/sub 2/和Al/sub 2/O/sub 3/栅极电介质的50 nm垂直替代栅(VRG) nmosfet
我们将原子层化学气相沉积(ALD)生长的HfO/sub 2/和Al/sub 2/O/sub 3/栅极电介质与垂直替代栅极(VRG) MOSFET几何结构中的多晶硅栅极电极集成在一起。这些晶体管是首次报道的具有ALD HfO/sub - 2/栅极介质的晶体管之一,并且HfO/sub - 2/靶等效氧化物厚度(tEOT)降至13 /spl / Aring/。这些VRG nmosfet中的多晶HfO/sub 2/薄膜在V/sub G/-V/sub T时具有极低的栅漏电流密度,为J/sub G/ /spl sim/ 10/sup -7/ A/cm/sup 2/,对于15 /spl的Aring/ tEOT器件,长/ = 0.6 V。这表明非晶栅极电介质可能不是满足GL要求所必需的。50 nm栅极长度为L/sub G/的HfO/sub 2/器件在1 V工作(超速V/sub GS/-V/sub T/ = 0.6 V)时,驱动电流[按编码宽度W/sub C/归一化]为490 /spl mu/A/ spl mu/m,具有良好的短通道性能。这些结果表明ALD与要求苛刻的VRG几何结构兼容,从而说明它应该非常适合基本上任何用硅兼容材料构建的新型器件结构。
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