Soft breakdown free atomic-layer-deposited silicon-nitride/SiO/sub 2/ stack gate dielectrics

A. Nakajima, Q. Khosru, T. Yoshirnoto, T. Kidera, S. Yokoyama
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引用次数: 6

Abstract

An extremely-thin (0.3-0.4 nm) silicon nitride layer has been deposited on thermally grown SiO/sub 2/ by an atomic-layer-deposition (ALD) technique. The boron penetration through the stack gate dielectrics has been dramatically suppressed and the reliability has been significantly improved. An exciting feature of no soft breakdown (SBD) events is observed in ramped voltage stressing and time-dependent dielectric breakdown (TDDB) characteristics. A model has been proposed, which consistently explains the no-SBD phenomena in ALD-silicon-nitride/SiO/sub 2/ stack gate dielectrics as well as the SBD events in conventional SiO/sub 2/ dielectrics.
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无软击穿原子层沉积氮化硅/SiO/ sub2 /堆叠栅电介质
采用原子层沉积(ALD)技术在热生长SiO/ sub2 /上沉积了一层极薄(0.3 ~ 0.4 nm)的氮化硅层。硼在堆栅介质中的渗透得到了显著抑制,可靠性得到了显著提高。在倾斜电压应力和时间相关介质击穿(TDDB)特性中观察到无软击穿(SBD)事件的令人兴奋的特征。本文提出了一个模型,该模型一致地解释了ald -氮化硅/SiO/sub - 2/堆叠栅介质中的无SBD现象以及传统SiO/sub - 2/介质中的SBD事件。
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