Jun Yuan, K. Rim, Ying Chen, M. Cai, Youseok Suh, Jihong Choi, Jie Deng, Jerry Bao, Zhimin Song, L. Ge, Hao Wang, Xiao-Yong Wang, Vicki Lin, C. Kuo, Sam Yang, Ashwin Rabindranath, S. Siva, Prasad Bhadri, Sungwon Kim, Kwon Lee, S. Cho, S. Kang, Saechoon Oh, S. Kwon, Xiangdong Chen, P. Pénzes, P. Agashe, W. Miller, P. Chidambaram
{"title":"High Performance Mobile SoC Productization with Second-Generation 10-nm FinFET Technology and Extension to 8-nm Scaling","authors":"Jun Yuan, K. Rim, Ying Chen, M. Cai, Youseok Suh, Jihong Choi, Jie Deng, Jerry Bao, Zhimin Song, L. Ge, Hao Wang, Xiao-Yong Wang, Vicki Lin, C. Kuo, Sam Yang, Ashwin Rabindranath, S. Siva, Prasad Bhadri, Sungwon Kim, Kwon Lee, S. Cho, S. Kang, Saechoon Oh, S. Kwon, Xiangdong Chen, P. Pénzes, P. Agashe, W. Miller, P. Chidambaram","doi":"10.1109/VLSIT.2018.8510674","DOIUrl":null,"url":null,"abstract":"We report on Snapdragon™ SDM845 mobile SoC in mass production with a second-generation 10-nm finFET technology. SDM845 exhibits 30–40% CPU/GPU performance gain over SDM835 (first-generation 10-nm finFET process) together with ~10% battery life increase driven by new design features and technology improvements in both transistor performance and uniformity, enabling high performance and low power solution for both mobile and computing/AI applications. Extending the technology scaling further, ~15% logic circuit area scaling over 10 nm has been realized in an 8-nm node with gate and BEOL pitch scaling enabled by quadruple patterning (LE^4). Yield equivalence to 10 nm has been demonstrated in 8-nm IP chips.","PeriodicalId":6561,"journal":{"name":"2018 IEEE Symposium on VLSI Technology","volume":"26 1","pages":"219-220"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2018.8510674","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We report on Snapdragon™ SDM845 mobile SoC in mass production with a second-generation 10-nm finFET technology. SDM845 exhibits 30–40% CPU/GPU performance gain over SDM835 (first-generation 10-nm finFET process) together with ~10% battery life increase driven by new design features and technology improvements in both transistor performance and uniformity, enabling high performance and low power solution for both mobile and computing/AI applications. Extending the technology scaling further, ~15% logic circuit area scaling over 10 nm has been realized in an 8-nm node with gate and BEOL pitch scaling enabled by quadruple patterning (LE^4). Yield equivalence to 10 nm has been demonstrated in 8-nm IP chips.