Zhewei Jiang, Shihui Yin, Mingoo Seok, Jae-sun Seo
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引用次数: 251
Abstract
We present an in-memory computing SRAM macro that computes XNOR-and-accumulate in binary/ternary deep neural networks on the bitline without row-by-row data access. It achieves 33X better energy and 300X better energy-delay product than digital ASIC, and also achieves significantly higher accuracy than prior in-SRAM computing macro (e.g., 98.3% vs. 90% for MNIST) by being able to support the mainstream DNN/CNN algorithms.
我们提出了一个内存计算SRAM宏,它可以在二进制/三元深度神经网络中在位线上计算xnor和累加,而不需要逐行访问数据。它实现了比数字ASIC高33倍的能量和300倍的能量延迟积,并且通过能够支持主流的DNN/CNN算法,也实现了比先前的sram计算宏(例如98.3% vs. MNIST的90%)更高的精度。