Reliability Studies of Silicon Interconnect Fabric

Abstract

The silicon interconnect fabric (Si-IF) is a heterogeneous integration platform that allows fine pitch interconnect between dies and substrate (< 10 µm) through thermal compression bonding of pillars on the Si-IF to pads on die side. In this integration scheme, bare dies of different nodes are attached directly to a prewired Si substrate. No underfill or molding compound is used in Si-IF. In this paper, we describe a novel passivation technique comprised of two processes. The first process is based on having sidewall passivation on Cu pillars on the Si-IF prior to TCB by controlling the etch profile of PECVD deposited SiO2 inter layer dielectric (ILD). The second process is based on passivation of the assembled dies on Si-IF post die-to-wafer bonding. To achieve the second encapsulation, study was done on Parylene C with two different thicknesses of 1 and 3 µm. Humidity testing was done in accordance with "85/85" Steady-State Humidity Life Test standard on blanket Cu coupons. Xray powder diffraction (XRD) revealed the presence of copper oxide after 72 hours of humidity testing in samples passivated with 1 and 3 µm of Parylene C. Next, we studied barrier properties of a multilayer thin film consisting of an inorganic (SiNx) layer and an organic (Parylene C) layer. XRD scans of samples subjected to humidity testing for up to 168 hours showed no signs of Cu oxide peaks. Humidity testing was done on bonded samples with multilayer encapsulation. Shear strength was measured before and after 120 hours of humidity testing. Average shear force of the samples was 135 N and 134.58 N before and after 120 hours of humidity testing, respectively. Resistance of passivated Si-IF wafers didn't change during the same period of humidity testing.