Multiple Workfunction High Performance FinFETs for Ultra-low Voltage Operation

2018 IEEE Symposium on VLSI Technology Pub Date : 2018-06-01 DOI:10.1109/VLSIT.2018.8510641

M. Togo, R. Asra, P. Balasubramaniam, X. Zhang, H. Yu, S. Yamaguchi, E. Geiss, H. Yang, B. Cohen, H. Lo, O. Hu, H. Lazar, O. Kwon, D. Burnett, J. Versaggi, E. Banghart, M. K. Hassan, E. Bazizi, L. Pantisano, J. G. Lee, S. Samavedam, D. K. Sohn

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引用次数: 4

Abstract

A multiple workfunction (multi-WF) integration technology was developed for ultra-low voltage operation in high performance FinFETs. It is essential to solve three key issues in the multi-WF process, a) short channel effect (SCE) degradation due to removing halo implants b) gate resistance increase due to multi-WF stack, and c) gate dielectric reliability degradation due to additional patterning. In this study, we resolve these issues through the combination of junction engineering and workfunction metal (WFM) boolean engineering in long channel (LC) and short channel (SC) devices for SCE, WFM stack optimization for gate resistance, and HK interface optimization for reliability. In logic devices, 15/13% N/PFET DC and 14% AC performance were improved without SCE or reliability degradation. In SRAM devices, 43% Vt mismatch (Vtmm) improvement resulted in record Vmin yield down to 0.4V on 128Mb 0.064μm2 SRAM array.

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用于超低电压工作的多功能高性能finfet

针对高性能finfet的超低电压工作，开发了一种多工作功能(multi-WF)集成技术。解决多wf工艺中的三个关键问题是至关重要的，a)去除晕植入物导致的短通道效应(SCE)降低;b)多wf堆叠导致的栅极电阻增加;以及c)额外图案导致的栅极介电可靠性降低。在本研究中，我们通过结合长通道(LC)和短通道(SC)器件中的结工程和工作功能金属(WFM)布尔工程来解决这些问题，WFM堆栈优化用于栅极电阻，HK接口优化用于可靠性。在逻辑器件中，15/13%的N/ fet直流和14%的交流性能得到改善，而没有SCE或可靠性下降。在SRAM器件中，43%的Vt失配(Vtmm)改善使得在128Mb 0.064μm2的SRAM阵列上，创纪录的Vmin产率降至0.4V。

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2018 IEEE Symposium on VLSI Technology

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