Comprehensive Thermal SPICE Modeling of FinFETs and BEOL with Layout Flexibility Considering Frequency Dependent Thermal Time Constant, 3D Heat Flows, Boundary/Alloy Scattering, and Interfacial Thermal Resistance with Circuit Level Reliability Evaluation

Abstract

Thermal SPICE modeling with distributed Rth-Cth network is proposed to provide more accurate AC self-heating (SH) results than two τc and one τc models. The thermal time constant of the hotspot (τhotspot) in FinFETs is frequency dependent, not a constant. The severe SH by boundary/alloy scattering and interfacial thermal resistance (ITR) is included in our SPICE. The modularized components of fins, metals, and IMDs provide device and routing flexibility, without additional FEM simulation. ITR of Si80Ge20/Si1-xGex is calculated by AMM model as the lower bound for SiGe FinFETs. The intrinsic electromigration (EM) improvement of Co interconnect (5X) is countervailed (5X→2.44X) by the increasing Tmetal due to the low thermal conductivity of Co. Different V2 placements on the power line of a ring oscillator (RO) are proposed to lower both the Tj (FinFET) and Tmetal. The predicted EM MTTF of Co interconnect with the additional heat dissipation by V2 insertion is ~5.65X of W/Cu interconnect.