Active Through-Silicon Interposer Based 2.5D IC Design, Fabrication, Assembly and Test

J. Jayabalan, V. C. Nachiappan, Sharon Lim Pei Siang, Wang Xiangyu, Jong Ming Chinq, S. Bhattacharya
{"title":"Active Through-Silicon Interposer Based 2.5D IC Design, Fabrication, Assembly and Test","authors":"J. Jayabalan, V. C. Nachiappan, Sharon Lim Pei Siang, Wang Xiangyu, Jong Ming Chinq, S. Bhattacharya","doi":"10.1109/ECTC.2019.00094","DOIUrl":null,"url":null,"abstract":"Active Through-Silicon Interposer (ATSI) based 2.5D/3D IC packaging is a solution to extend Moore's law beyond the limitations inherent in 2D packages. We present the implementation of an ATSI platform for providing Analog to Digital converter (ADC), Digital to Analog converter (DAC) and embedded Power Management Unit (ePMU) functions to support high performance logic, fabrication of 140 micron pitch Via-Last Through-Silicon Via (TSV) of 40 micron height, assembly of Chip-on-Chip-on Substrate, functional test and reliability assessment. The active interposer fabricated in 130nm CMOS easily supports the I/O, Analog, Electro Static Discharge (ESD), De-cap functions with via-last TSV. This approach enables significant die-size reduction of the top die (usually in expensive 16nm CMOS or below tech. node) to achieve system miniaturization and cost reduction","PeriodicalId":6726,"journal":{"name":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","volume":"108 1","pages":"587-593"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2019.00094","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

Active Through-Silicon Interposer (ATSI) based 2.5D/3D IC packaging is a solution to extend Moore's law beyond the limitations inherent in 2D packages. We present the implementation of an ATSI platform for providing Analog to Digital converter (ADC), Digital to Analog converter (DAC) and embedded Power Management Unit (ePMU) functions to support high performance logic, fabrication of 140 micron pitch Via-Last Through-Silicon Via (TSV) of 40 micron height, assembly of Chip-on-Chip-on Substrate, functional test and reliability assessment. The active interposer fabricated in 130nm CMOS easily supports the I/O, Analog, Electro Static Discharge (ESD), De-cap functions with via-last TSV. This approach enables significant die-size reduction of the top die (usually in expensive 16nm CMOS or below tech. node) to achieve system miniaturization and cost reduction
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
基于有源通硅中间体的2.5D集成电路设计、制造、组装和测试
基于有源通硅中间体(ATSI)的2.5D/3D IC封装是一种扩展摩尔定律的解决方案,超越了2D封装固有的限制。我们提出了一个ATSI平台的实现,提供模数转换器(ADC),数模转换器(DAC)和嵌入式电源管理单元(ePMU)功能,以支持高性能逻辑,制造140微米间距的40微米高度的通硅通孔(TSV),片上片基板组装,功能测试和可靠性评估。采用130nm CMOS制造的有源中间体可轻松支持I/O、模拟、静电放电(ESD)、De-cap等功能。这种方法可以显著减小顶晶片(通常采用昂贵的16nm CMOS或以下技术节点)的晶片尺寸,从而实现系统小型化和降低成本
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Further Enhancement of Thermal Conductivity through Optimal Uses of h-BN Fillers in Polymer-Based Thermal Interface Material for Power Electronics A Novel Design of a Bandwidth Enhanced Dual-Band Impedance Matching Network with Coupled Line Wave Slowing A New Development of Direct Bonding to Aluminum and Nickel Surfaces by Silver Sintering in air Atmosphere Signal Integrity of Submicron InFO Heterogeneous Integration for High Performance Computing Applications Multilayer Glass Substrate with High Density Via Structure for All Inorganic Multi-chip Module
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1