Novel hybrid DRAM/MRAM design for reducing power of high performance mobile CPU

K. Abe, H. Noguchi, E. Kitagawa, N. Shimomura, J. Ito, S. Fujita
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引用次数: 31

Abstract

This paper presents novel DRAM/MRAM hybrid memory design that enables effective power reduction for high performance mobile CPU. Power reduction by about 60% of SRAM-based cache while application is running can be achieved with D-MRAM-based cache memory in CPU. This result is attributable to both novel D-MRAM memory design and lowest programming energy, 0.09pJ, of advanced p-MTJ with ultra-high speed write and low power write (3ns, 50uA).
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新型混合DRAM/MRAM设计,降低高性能移动CPU功耗
本文提出了一种新的DRAM/MRAM混合存储器设计,可以有效地降低高性能移动CPU的功耗。在应用程序运行时,使用基于d - mram的CPU缓存可以实现约60%的基于sram的缓存功耗降低。这一结果归功于新颖的D-MRAM存储器设计和具有超高速写入和低功耗写入(3ns, 50uA)的先进p-MTJ的最低编程能量(0.09pJ)。
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