An example of rapid design of power electronics control with FPGA in Matlab/Simulink

2011 VII Southern Conference on Programmable Logic (SPL) Pub Date : 2011-04-13 DOI:10.1109/SPL.2011.5782627

Juan Pablo Tettamanti, A. Latini, M. Aguirre

引用次数: 2

Abstract

This paper deals with the problem of the design of an all-digital implementation of a three-phase PLL and the control logic of a shunt active filter implemented with a Multilevel Current Source Inverter (MCSI). The active filter is connected to the medium voltage level of a power distribution system where compensation of reactive power and harmonics is mandatory. The PLL is essential to obtain a reference frame for grid synchronization. The performance of proposed PLL structure and logic control is simulated via Matlab/Simulink. The proposed PLL structure shows fast synchronization and adequate tolerance to grid voltage unbalance. Both the PLL and the control logic can be downloaded and tested on a Field-Programmable-Gate-Array (FPGA) using the same software tool.

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基于Matlab/Simulink的电力电子控制FPGA快速设计实例

本文研究了三相锁相环的全数字实现和用多电平电流源逆变器(MCSI)实现的并联有源滤波器的控制逻辑设计问题。有源滤波器连接到配电系统的中压级，其中无功功率和谐波补偿是强制性的。锁相环是获得电网同步参考系的关键。通过Matlab/Simulink对所提出的锁相环结构和逻辑控制的性能进行了仿真。所提出的锁相环结构同步速度快，对电网电压不平衡有足够的容忍度。锁相环和控制逻辑都可以下载并使用相同的软件工具在现场可编程门阵列(FPGA)上进行测试。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2011 VII Southern Conference on Programmable Logic (SPL)

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