P. Huang, X. Liu, W. H. Li, Y. X. Deng, B. Chen, Y. Lu, B. Gao, L. Zeng, K. Wei, G. Du, X. Zhang, J. Kang
{"title":"A physical based analytic model of RRAM operation for circuit simulation","authors":"P. Huang, X. Liu, W. H. Li, Y. X. Deng, B. Chen, Y. Lu, B. Gao, L. Zeng, K. Wei, G. Du, X. Zhang, J. Kang","doi":"10.1109/IEDM.2012.6479110","DOIUrl":null,"url":null,"abstract":"A physical based analytic model of metal oxide based RRAM cell under DC and pulse operation modes is presented. In this model, the transport behaviors of oxygen vacancies and oxygen ions, metal conductivity, electron hopping and heat conduction and the parasitic capacitance and resistance effects are covered. The developed analytic model is verified and calibrated by measured data. Furthermore, we implement the analytic model in a 2×2 RRAM array simulation and investigate the reliability of RRAM array for the first time.","PeriodicalId":6376,"journal":{"name":"2012 International Electron Devices Meeting","volume":"78 1","pages":"26.6.1-26.6.4"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"44","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2012.6479110","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 44
Abstract
A physical based analytic model of metal oxide based RRAM cell under DC and pulse operation modes is presented. In this model, the transport behaviors of oxygen vacancies and oxygen ions, metal conductivity, electron hopping and heat conduction and the parasitic capacitance and resistance effects are covered. The developed analytic model is verified and calibrated by measured data. Furthermore, we implement the analytic model in a 2×2 RRAM array simulation and investigate the reliability of RRAM array for the first time.
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