Nuo Xu, Fan Chen, D. Apalkov, Weiyi Qi, Jing Wang, Zhengping Jiang, W. Choi, D. Kim
{"title":"Rare-Failure Oriented STT-MRAM Technology Optimization","authors":"Nuo Xu, Fan Chen, D. Apalkov, Weiyi Qi, Jing Wang, Zhengping Jiang, W. Choi, D. Kim","doi":"10.1109/VLSIT.2018.8510637","DOIUrl":null,"url":null,"abstract":"A rare-failure oriented optimization methodology for state-of-the-art STT-MRAM technology has been proposed. Physics-based device models and novel rare event sampling algorithms are used for massively parallel Monte Carlo simulations to identify the critical process variability sources and to evaluate the Write Error Rate (WER) at the resolution of 1E-9. New rare-failure figure-of-merits (FoMs) and design guidelines are suggested for optimizing the operation conditions of STT-MRAMs so that the energy-delay product can be minimized at satisfactory WER level.","PeriodicalId":6561,"journal":{"name":"2018 IEEE Symposium on VLSI Technology","volume":"11 1","pages":"187-188"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2018.8510637","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A rare-failure oriented optimization methodology for state-of-the-art STT-MRAM technology has been proposed. Physics-based device models and novel rare event sampling algorithms are used for massively parallel Monte Carlo simulations to identify the critical process variability sources and to evaluate the Write Error Rate (WER) at the resolution of 1E-9. New rare-failure figure-of-merits (FoMs) and design guidelines are suggested for optimizing the operation conditions of STT-MRAMs so that the energy-delay product can be minimized at satisfactory WER level.