Filling TSV of different dimension using galvanic copper deposition

D. Rohde, C. Jager, Khatera Hazin, A. Uhlig
{"title":"Filling TSV of different dimension using galvanic copper deposition","authors":"D. Rohde, C. Jager, Khatera Hazin, A. Uhlig","doi":"10.1109/IMPACT.2011.6117182","DOIUrl":null,"url":null,"abstract":"Filling through silicon via (TSV) with copper is one important process step in 3D-integration. Void free and reliable galvanic copper deposition is essential for yield and lifetime of microelectronic devices. Different TSV applications, as chip stacking and interposer, require different TSV dimensions. This demands high flexibility and applicability for small and large via sizes in the galvanic filling process. This paper compares two different acidic copper systems in respect of their TSV filling properties. Both systems mainly differ in the leveler compound. System A shows super-conformal filling behavior and System B bottom-up filling. The properties of copper being deposited using System A and B respectively vary further in respect of copper grain size homogeneity, stress of the copper deposits, recrystallization temperature and incorporation of additives. The influence of organic copper additives on the mechanical, thermal, and electrical properties of the copper deposits is discussed. Using the example of System B, filling aspects as well as process optimization will be outlined. For process optimization electrochemical potential characteristics (E vs. t) during the filling process are used to identify important filling steps. Filling examples for small as well as large TSV feature sizes will be discussed.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"124 1","pages":"355-358"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMPACT.2011.6117182","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

Filling through silicon via (TSV) with copper is one important process step in 3D-integration. Void free and reliable galvanic copper deposition is essential for yield and lifetime of microelectronic devices. Different TSV applications, as chip stacking and interposer, require different TSV dimensions. This demands high flexibility and applicability for small and large via sizes in the galvanic filling process. This paper compares two different acidic copper systems in respect of their TSV filling properties. Both systems mainly differ in the leveler compound. System A shows super-conformal filling behavior and System B bottom-up filling. The properties of copper being deposited using System A and B respectively vary further in respect of copper grain size homogeneity, stress of the copper deposits, recrystallization temperature and incorporation of additives. The influence of organic copper additives on the mechanical, thermal, and electrical properties of the copper deposits is discussed. Using the example of System B, filling aspects as well as process optimization will be outlined. For process optimization electrochemical potential characteristics (E vs. t) during the filling process are used to identify important filling steps. Filling examples for small as well as large TSV feature sizes will be discussed.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
采用电铜沉积法填充不同尺寸的TSV
用铜填充硅孔(TSV)是3d集成的一个重要工艺步骤。无空隙可靠的电铜沉积对微电子器件的良率和寿命至关重要。不同的TSV应用,如芯片堆叠和中介,需要不同的TSV尺寸。这要求高灵活性和适用性的小和大通孔尺寸在电填充过程中。比较了两种不同酸性铜体系的TSV填充性能。这两种系统的主要区别在于矫直剂。体系A表现为超保形充填行为,体系B表现为自下而上充填行为。系统A和系统B沉积铜的性能在铜晶粒尺寸均匀性、镀层应力、再结晶温度和添加剂掺入等方面有进一步的差异。讨论了有机铜添加剂对铜镀层力学、热学和电学性能的影响。以系统B为例,概述填充方面以及流程优化。在工艺优化方面,利用填充过程中的电化学电位特性(E vs. t)来确定重要的填充步骤。将讨论小的和大的TSV特征尺寸的填充示例。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Comparison the reliability of small plated-through hole with different diameters under thermal stress Co-simulation of capacitive coupling pads assignment for capacitive coupling interconnection applications Microstructure evolution in a sandwich structure of Ni/SnAg/Ni microbump during reflow Comparison among individual thermal cycling, vibration test and the combined test for the life estimation of electronic components Limitations of gluing as a replacement of ultrasonic welding: Attaching Lithium battery contacts to PCBs
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1