Novel direct-tunneling-current (DTC) method for channel length extraction beyond sub-50nm gate CMOS

Sungkwon Hong, Yaohui Zhang, Y. Luo, T. Suligoj, Seong-Dong Kim, J. Woo, R. Li, B. Min, B. Hradsky, A. Vandooren, B. Nguyen, K. Wang
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引用次数: 3

Abstract

A novel method for accurate gate length extraction has been developed using direct tunneling current (DTC) through thin gate oxide. Applied to decanano CMOS devices, the proposed method is verified to be free from a severe assumption of unified effective mobility that is one of limitations of conventional method to sub-0.1 /spl mu/m. The DTC method is also insensitive to doping concentration and gate oxide thinning effect at the corner regions. In addition, we have studied the channel length dependence on gate line-edge roughness by comparing the DTC method and the conventional channel current method.
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基于直接隧道电流(DTC)的亚50nm栅极CMOS通道长度提取方法
提出了一种利用直接隧道电流(DTC)通过薄栅极氧化物精确提取栅极长度的新方法。应用于decanano CMOS器件,验证了该方法摆脱了统一有效迁移率的严格假设,这是传统方法在0.1 /spl mu/m以下的限制之一。DTC方法对掺杂浓度和边角区栅氧化物减薄效应也不敏感。此外,我们还通过比较DTC方法和传统的通道电流方法,研究了通道长度与栅极线边缘粗糙度的关系。
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