教程摘要

A. Belmonte, Asir Intisar Khan, B. Kaczer, M. Siddabathula
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引用次数: 0

摘要

摘要:存储器技术在半导体市场中占有巨大的份额。尽管多年来提出了大量的存储设备概念,但其中只有一小部分实现了大规模生产。可靠性是限制半导体行业采用存储技术的主要方面之一。本教程旨在概述存储设备的主要可靠性特征以及评估它们的表征技术。本文提供了具有代表性的案例研究,即RRAM和DRAM,以回顾在存储器技术被行业广泛接受之前需要克服的挑战,并描述如何识别和减轻可靠性故障的原因。由于对创新存储设备和架构的追求是无情和快节奏的,本教程还提供了对存储技术和相关可靠性挑战的未来展望。摘要:当今的计算系统已经达到了传统材料(如硅)的基本极限,并且传统的布局将存储和计算分开。为了克服这些挑战,基于硫族化合物(如Ge2Sb2Te5 (GST225))的相变存储器(PCM)技术在数据存储和神经形态计算方面都有很大的前景。然而,使用传统的相变材料,PCM操作需要很大的功耗,并且受到电阻漂移的影响,限制了其在神经启发和节能数据存储方面的潜力。在本教程中,我们将使用新型相变纳米复合材料Ge4Sb6Te7 (GST467)和基于GST的相变超晶格来解决PCM器件中的一些挑战。我们将讨论节能和神经启发的PCM器件的操作,展示电阻状态的逐渐变化,低功率开关,以及低电阻漂移的多电平操作。我们还将关注超晶格材料特性与PCM器件性能之间的基本相关性,这对于确保这种技术在低功耗和脑启发计算中的可靠性和鲁棒性非常重要。摘要:在简要回顾了选定的可靠性基础知识之后,我们讨论了场效应晶体管(fet)中发生的主要退化机制。这些机制包括SILC(应力诱发泄漏电流)、TDDB(时变介质击穿)、BTI(偏置温度不稳定性)、RTN(随机电报噪声)和HCD(热载流子退化)以及伴随的自加热(SHE),并与缺陷的潜在特性相关联。对机械应力的影响也作了简要评述。然后,我们表明这些缺陷在许多新兴技术和应用中起着至关重要的作用,包括CryoCMOS和2D场效应管,并负责深度缩放器件的退化变异性。最后,我们展示了如何在电路模拟中考虑器件退化,并展示了如何深入了解缺陷特性,以帮助我们设计新的器件和应用。教程4:22FDX®射频/毫米波可靠性完全耗尽绝缘体上硅(FDSOI)技术已被证明是射频(RF)和毫米波(mmWave)应用的最佳候选技术之一,具有最低的功耗,最低的系统占用空间和有效的短信道静电控制效应。这些优势加上FDSOI技术提供的反向偏置调谐和可扩展性旋钮,使设计人员可以更自由地探索和增强其RF/毫米波设计。他们需要将设备推向极限,以优化和释放其ip /设计的最佳竞争力。它会对设备产生高电压/电流应力,挑战标准技术鉴定可靠性模型及其覆盖范围。本教程将提供有关22FDX®可靠性工作的概述,以支持RF/毫米波设计。它将包括非导电热载流子注入(NCHCI)研究、非状态TDDB建模、HCI低Vgs建模、基于TDDB和RF/毫米波波形分析的安全操作区域方法。波形分析为评估基于所有直流可靠性模型的RF工作提供了基础,并有助于确定关键RF/毫米波ip的尺寸,以确保安全的产品使用寿命,减少最终产品的设计迭代。
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Summary of Tutorials
Tutorial 1: Memory Technology: Reliability Challenges and Future PerspectivesAbstract: Memory technologies occupy a huge share of the semiconductor market. Despite a large plethora of memory device concepts proposed over the years, only a restricted group of them has achieved large-scale production. Reliability is one of the main aspects limiting the adoption of a memory technology by the semiconductor industry. This tutorial aims at outlining the main reliability characteristics of memory devices and the characterization techniques to assess them. Representative case studies, namely RRAM and DRAM, are provided, to review the challenges to be overcome before a memory technology is widely accepted by the industry, and to describe how the causes of reliability failure are identified and mitigated. As the pursuit of innovative memory devices and architectures is relentless and fast-paced, this tutorial also provides future perspectives on memory technology and the related reliability challenges.Tutorial 2: Reliability of Energy-Efficient Phase Change Memory Based on Novel Superlattices and NanocompositesAbstract: Today’s computing systems are reaching fundamental limits with conventional materials like silicon, and with conventional layouts that separate memory and computing. To overcome these challenges, phase change memory (PCM) technology based on chalcogenides like Ge2Sb2Te5 (GST225) hold great promise for both data storage and neuromorphic computing. However, using conventional phase change materials, PCM operation requires large power consumption and suffers from resistance drift, limiting its potential for neuro-inspired and energy-efficient data storage. In this tutorial, we will address some of these challenges in PCM devices using novel phase change nanocomposite Ge4Sb6Te7 (GST467) and GST based phase-change superlattices. We will discuss the operation of energy-efficient and neuro-inspired PCM devices demonstrating gradual change of resistance states, low power switching, and multilevel operation with low resistance drift. We will also focus on the fundamental correlation between superlattice material characteristics and PCM device performance, important to ensure reliability and robustness of such technology for low power and brain-inspired computing.Tutorial 3: Brief Introduction to Device and Circuit ReliabilityAbstract: After a brief review of selected reliability basics, we discuss the main degradation mechanisms occurring in Field-Effect Transistors (FETs). These mechanisms include SILC (Stress Induced Leakage Current), TDDB (Time-Dependent Dielectric Breakdown), BTI (Bias Temperature Instability), RTN (Random Telegraph Noise), and HCD (Hot Carrier Degradation) with the accompanying Self-Heating (SHE) and are linked with the underlying properties of defects. The effects of Mechanical Stress are also briefly reviewed. We then show that these defects play the essential role in many emerging technologies and applications, including CryoCMOS and 2D FETs, and are responsible for degradation variability in deeply-scaled devices. Finally, we show how device degradation can be accounted for in circuit simulations and demonstrate how in-depth knowledge of defect properties can be used to our advantage to design new devices and applications.Tutorial 4: 22FDX® RF/mmWave ReliabilityAbstract. The Fully Depleted Silicon on Insulator (FDSOI) technology was proven to be one of the best candidate for radio frequency (RF) and millimeter wave (mmWave) applications with lowest power consumption, lowest system footprint and the efficient electrostatic control of short channel effects. These advantages in addition with back-bias tuning and scalability knob offered by FDSOI technology give designers more freedom to explore and enhance their RF/mmWave designs. They need to push the devices at their limits to optimize and unlock best competitiveness for their IPs/designs. It results in high voltage/current stress to the devices, challenging standard technology qualification reliability models and their coverage. This tutorial will offer an overview about 22FDX® reliability effort to support the RF/mmWave design. It will include Non Conducting hot carrier injection (NCHCI) studies, off-state TDDB modeling, HCI Low Vgs modeling, Safe Operating Area methodology based on TDDB & RF/mmWave waveform analysis. The waveform analysis provides a base for assessing RF operation based on all DC reliability models and helps sizing critical RF/mmWave IPs for safe product lifetime, reducing design iterations to final product.
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Summary of Tutorials Gate-to-drain/source overlap and asymmetry effects on hot-carrier generation Degradation mapping of IGZO TFTs Discussion Group II – Circuit Reliability Impact of Single Defects on NBTI and PBTI Recovery in SiO2 Transistors
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