Challenges of power electronic packaging and modeling

Power electronic packaging is one of the fastest changing areas of technology in the power electronic industry due to the rapid advances in power integrated circuit (IC) fabrication and the demands of a growing market in almost all areas of power electronic application such as portable electronics, consumer electronics, home electronics, computing electronics, automotive, railway and high/strong power industry. However, due to the intrinsic high power dissipation, the performance requirement for power products are extremely high, especially in handling harsh thermal and electrical environments. The design rules and material and structure layout of power packaging are quite different from regular IC packaging. This talk will present a state-of-art and in-depth overview of recent advances, challenges and opportunities in power electronic packaging design and modeling. A review of recent advances in power electronic packaging is presented based on the development of power device integration. The talk will cover in more detail how challenges in both semiconductor content and advanced power package design and materials have co-enabled significant advances in power device capability during recent years. Extrapolating the same trends in representative areas for the remainder of the decade serves to highlight where further improvement in materials and techniques can drive continued enhancements in usability, efficiency, reliability and overall cost of power semiconductor solutions. Along with new power packaging development, modeling is a key to assure successful package design. An overview of the power package modeling is presented. Challenges of power semiconductor packaging and modeling in both next generation design and assembly processes are presented and discussed.