低功耗、可重复性操作的电阻式RAM技术与电路优化

2014 IEEE International Electron Devices Meeting Pub Date : 2014-12-01 DOI:10.1109/IEDM.2014.7047125

D. Sekar, B. Bateman, U. Raghuram, S. Bowyer, Y. Bai, M. Calarrudo, P. Swab, J. Wu, S. Nguyen, N. Mishra, R. Meyer, M. Kellam, B. Haukness, C. Chevallier, H. Wu, H. Qian, F. Kreupl, G. Bronner

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引用次数: 26

摘要

电阻性RAM (RRAM)的低功耗、可重复性操作要求在写入过程中控制电容性浪涌电流。我们提出了一种具有内置浪涌电流减小层的晶圆友好型TiN/导电TaOx/HfO2/TiN RRAM。与传统RRAM相比，它减少了33%的最坏情况写入电流和23倍的失败位计数。提出了一种控制浪涌电流的新型电路，使写电流提高40%，续航时间提高63%。介绍了用这些概念实现256kb芯片的交换、持久和保留数据。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Technology and circuit optimization of resistive RAM for low-power, reproducible operation

Low-power, reproducible operation of Resistive RAM (RRAM) requires control of capacitive surge currents during write. We propose a fab-friendly TiN/conductive TaOx/HfO2/TiN RRAM with a built-in surge current reduction layer. It reduces worst case write current by 33% and fail bit count by 23× compared to conventional RRAM. A novel circuit to control surge current is demonstrated that improves write current by 40% and endurance by 63%. Switching, endurance and retention data for a 256kb chip with these concepts is presented.

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2014 IEEE International Electron Devices Meeting

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