7.1采用15nm CMOS技术的低功耗64Gb MLC nand闪存

2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers Pub Date : 2015-03-19 DOI:10.1109/ISSCC.2015.7062959

Mario Sako, Y. Watanabe, T. Nakajima, Jumpei Sato, K. Muraoka, M. Fujiu, F. Kouno, M. Nakagawa, M. Masuda, Koji Kato, Yuri Terada, Y. Shimizu, M. Honma, Akihiro Imamoto, Tomoko Araya, Hayato Konno, Takuya Okanaga, Tomofumi Fujimura, Xiaoqing Wang, Mai Muramoto, M. Kamoshida, M. Kohno, Yoshinao Suzuki, Tomoharu Hashiguchi, Tsukasa Kobayashi, Masashi Yamaoka, Ryuji Yamashita

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引用次数: 12

摘要

最近，智能手机、平板电脑和笔记本电脑等移动应用对高通量NAND闪存系统的需求一直在增长。为了获得更高的吞吐量，系统采用多个NAND闪存同时并行运行。移动设备的可用功率受到严格限制，峰值总工作电流可能高到足以引起大的电源电压下降甚至意外的系统关闭。因此，降低NAND闪存的工作功率和峰值工作电流非常重要。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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7.1 A low-power 64Gb MLC NAND-flash memory in 15nm CMOS technology

The demand for high-throughput NAND Flash memory systems for mobile applications such as smart phones, tablets, and laptop PCs with solid-state drives (SSDs) has been growing recently. To obtain higher throughput, systems employ multiple NAND Flash memories operating simultaneously in parallel. The available power for a mobile device is severely restricted and the peak total operating current may be high enough to cause large supply-voltage drop or even an unexpected system shutdown. Therefore it is important for NAND Flash memories to reduce operating power and peak operating current.

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2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers

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