SOI DRAM的特点和可能性

Y. Yamaguchi, Y. Inoue
{"title":"SOI DRAM的特点和可能性","authors":"Y. Yamaguchi, Y. Inoue","doi":"10.1109/SOI.1995.526491","DOIUrl":null,"url":null,"abstract":"An SOI DRAM is a candidate for giga-bit scale DRAM with improved data retention characteristics and/or simple capacitor structure achieved by low leakage current, reduced soft error effect and low Cb/Cs ratio. The SOI DRAM is also expected to realize low-voltage memory which will be used in handy systems in a forthcoming multimedia era by reduced junction capacitance and back-gate-bias effect. However, some drawbacks are also suspected owing to floating substrate effects. In the present report, these features are summarized to demonstrate the perspective on SOI DRAM.","PeriodicalId":149490,"journal":{"name":"1995 IEEE International SOI Conference Proceedings","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1995-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"SOI DRAM: its features and possibility\",\"authors\":\"Y. Yamaguchi, Y. Inoue\",\"doi\":\"10.1109/SOI.1995.526491\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An SOI DRAM is a candidate for giga-bit scale DRAM with improved data retention characteristics and/or simple capacitor structure achieved by low leakage current, reduced soft error effect and low Cb/Cs ratio. The SOI DRAM is also expected to realize low-voltage memory which will be used in handy systems in a forthcoming multimedia era by reduced junction capacitance and back-gate-bias effect. However, some drawbacks are also suspected owing to floating substrate effects. In the present report, these features are summarized to demonstrate the perspective on SOI DRAM.\",\"PeriodicalId\":149490,\"journal\":{\"name\":\"1995 IEEE International SOI Conference Proceedings\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1995 IEEE International SOI Conference Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.1995.526491\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 IEEE International SOI Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1995.526491","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

SOI DRAM是千兆级DRAM的候选产品,具有更好的数据保留特性和/或简单的电容器结构,通过低泄漏电流,减少软误差效应和低Cb/Cs比实现。SOI DRAM还有望通过降低结电容和反向偏置效应,实现在即将到来的多媒体时代的便携式系统中使用的低压存储器。然而,由于浮动衬底效应,也存在一些缺陷。在本报告中,总结了这些特点,以展示SOI DRAM的前景。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
SOI DRAM: its features and possibility
An SOI DRAM is a candidate for giga-bit scale DRAM with improved data retention characteristics and/or simple capacitor structure achieved by low leakage current, reduced soft error effect and low Cb/Cs ratio. The SOI DRAM is also expected to realize low-voltage memory which will be used in handy systems in a forthcoming multimedia era by reduced junction capacitance and back-gate-bias effect. However, some drawbacks are also suspected owing to floating substrate effects. In the present report, these features are summarized to demonstrate the perspective on SOI DRAM.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Analytical threshold voltage model for short channel n/sup +/-p/sup +/ double-gate SOI MOSFETs Front and back gate interface-trap generation due to hot carrier stress in fully depleted SOI/MOSFETs SOI material characterization using optical second harmonic generation Minimum parasitic resistance for ultra-thin SOI MOSFET with high-permittivity gate insulator performed by lateral contact structure Transient effects in floating body SOI NMOSFETs
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1