{"title":"用于闪存技术的n区折叠高压MOS晶体管","authors":"F. Hofmann, W. Rosner, E. Landgraf","doi":"10.1109/ESSDERC.2000.194757","DOIUrl":null,"url":null,"abstract":"Floating gate devices like EEPROM and Flash memory require high voltages up to 20 V for programming and erase operations. This high voltage can only be handled with large MOS transistors. A common approach is to form a drift region which increases the on-resistance of the transistor. Here an extra voltage drop between the contact and the transistor channel is gernerated. In order to save chip area, a transistor is presented with the high resistive drift regions folded into the trenches on both sides of the gate.","PeriodicalId":354721,"journal":{"name":"30th European Solid-State Device Research Conference","volume":"162 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"High Voltage MOS Transistor with a Folded n- Region for Flash Technology\",\"authors\":\"F. Hofmann, W. Rosner, E. Landgraf\",\"doi\":\"10.1109/ESSDERC.2000.194757\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Floating gate devices like EEPROM and Flash memory require high voltages up to 20 V for programming and erase operations. This high voltage can only be handled with large MOS transistors. A common approach is to form a drift region which increases the on-resistance of the transistor. Here an extra voltage drop between the contact and the transistor channel is gernerated. In order to save chip area, a transistor is presented with the high resistive drift regions folded into the trenches on both sides of the gate.\",\"PeriodicalId\":354721,\"journal\":{\"name\":\"30th European Solid-State Device Research Conference\",\"volume\":\"162 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-09-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"30th European Solid-State Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.2000.194757\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"30th European Solid-State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2000.194757","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High Voltage MOS Transistor with a Folded n- Region for Flash Technology
Floating gate devices like EEPROM and Flash memory require high voltages up to 20 V for programming and erase operations. This high voltage can only be handled with large MOS transistors. A common approach is to form a drift region which increases the on-resistance of the transistor. Here an extra voltage drop between the contact and the transistor channel is gernerated. In order to save chip area, a transistor is presented with the high resistive drift regions folded into the trenches on both sides of the gate.