{"title":"基于可调谐逆变器的低压OTA用于连续时间ΣΔ ADC","authors":"I. Mostafa, A. Ismail","doi":"10.1109/SOCC.2015.7406916","DOIUrl":null,"url":null,"abstract":"Inverter-based implementation of operational-transconductance amplifiers (OTAs) is an attractive approach for low-voltage realization of analog sub-systems. However, the high sensitivity of inverter-like amplifiers performance to process and temperature variations limits the achievable performance of the whole system, across process and temperature corners. In this paper, a tuning technique is proposed to maintain inverter-based amplifier performance across process and temperature corners without requiring additional voltage headroom than that required by the inverter circuit. The introduced technique is used to implement a third order continuous-time (CT) ΣΔ analog-to-digital converter (ADC). A 74 dB signal-to-noise and distortion ratio (SNDR) is achieved, for a signal bandwidth of 64 kHz at a sampling frequency of 6.4 MHz, while consuming 400 μA from 0.8 V, supply, in 65 nm CMOS technology.","PeriodicalId":329464,"journal":{"name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Tunable Inverter-Based, Low-Voltage OTA for Continuous-Time ΣΔ ADC\",\"authors\":\"I. Mostafa, A. Ismail\",\"doi\":\"10.1109/SOCC.2015.7406916\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Inverter-based implementation of operational-transconductance amplifiers (OTAs) is an attractive approach for low-voltage realization of analog sub-systems. However, the high sensitivity of inverter-like amplifiers performance to process and temperature variations limits the achievable performance of the whole system, across process and temperature corners. In this paper, a tuning technique is proposed to maintain inverter-based amplifier performance across process and temperature corners without requiring additional voltage headroom than that required by the inverter circuit. The introduced technique is used to implement a third order continuous-time (CT) ΣΔ analog-to-digital converter (ADC). A 74 dB signal-to-noise and distortion ratio (SNDR) is achieved, for a signal bandwidth of 64 kHz at a sampling frequency of 6.4 MHz, while consuming 400 μA from 0.8 V, supply, in 65 nm CMOS technology.\",\"PeriodicalId\":329464,\"journal\":{\"name\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2015.7406916\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2015.7406916","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Tunable Inverter-Based, Low-Voltage OTA for Continuous-Time ΣΔ ADC
Inverter-based implementation of operational-transconductance amplifiers (OTAs) is an attractive approach for low-voltage realization of analog sub-systems. However, the high sensitivity of inverter-like amplifiers performance to process and temperature variations limits the achievable performance of the whole system, across process and temperature corners. In this paper, a tuning technique is proposed to maintain inverter-based amplifier performance across process and temperature corners without requiring additional voltage headroom than that required by the inverter circuit. The introduced technique is used to implement a third order continuous-time (CT) ΣΔ analog-to-digital converter (ADC). A 74 dB signal-to-noise and distortion ratio (SNDR) is achieved, for a signal bandwidth of 64 kHz at a sampling frequency of 6.4 MHz, while consuming 400 μA from 0.8 V, supply, in 65 nm CMOS technology.