{"title":"卫星通信时复用二叉树的重构","authors":"K. Raghunandan, F. Coakley","doi":"10.1109/DFTVS.1991.199970","DOIUrl":null,"url":null,"abstract":"A time-multiplexed version of a binary tree channeliser can be implemented as a pipelined structure. Reconfiguration aspects of such a pipeline are considered in this paper. By developing a serial-module scheme for reconfiguration it is shown that the SM scheme offers better reliability than its equivalent binary trees. A digital filter is assumed as the basic processing element of the pipeline and the design trade-offs needed to implement a digital channeliser on a single chip using CMOS technology are described.<<ETX>>","PeriodicalId":440536,"journal":{"name":"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems","volume":"123 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Reconfiguration of time-multiplexed binary trees for satellite communication\",\"authors\":\"K. Raghunandan, F. Coakley\",\"doi\":\"10.1109/DFTVS.1991.199970\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A time-multiplexed version of a binary tree channeliser can be implemented as a pipelined structure. Reconfiguration aspects of such a pipeline are considered in this paper. By developing a serial-module scheme for reconfiguration it is shown that the SM scheme offers better reliability than its equivalent binary trees. A digital filter is assumed as the basic processing element of the pipeline and the design trade-offs needed to implement a digital channeliser on a single chip using CMOS technology are described.<<ETX>>\",\"PeriodicalId\":440536,\"journal\":{\"name\":\"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems\",\"volume\":\"123 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-11-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFTVS.1991.199970\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFTVS.1991.199970","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reconfiguration of time-multiplexed binary trees for satellite communication
A time-multiplexed version of a binary tree channeliser can be implemented as a pipelined structure. Reconfiguration aspects of such a pipeline are considered in this paper. By developing a serial-module scheme for reconfiguration it is shown that the SM scheme offers better reliability than its equivalent binary trees. A digital filter is assumed as the basic processing element of the pipeline and the design trade-offs needed to implement a digital channeliser on a single chip using CMOS technology are described.<>