A. Gautier-Levine, P. Audren, G. Post, M. Favennec, J. Dumas
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A study of trap related drain lag effects in InP HFETs
The drain lag effect is a low frequency parasitic response of field effect transistors on III-V semiconductors. HFET devices were fabricated with InP semiconductor and quaternary lattice-matched compound channels, respectively. From the study of the drain lag value of these two types of devices, the importance of proper technological processes is emphasized.
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