CH/sub /H/sub / 2/反应离子刻蚀过程中inp基光电器件的表面和侧壁损伤

T. Bottner, H. Krautle, E. Kuphal, K. Miethe, H. Hartnagel
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引用次数: 9

摘要

系统研究了CH/sub - 4/ H/sub - 2基气体对InP基半导体反应离子刻蚀(RIE)的影响。从卢瑟福后向散射分析中发现,晶体损伤与工艺参数的强烈依赖导致优化工艺的损伤区域小于3 nm。电容电压谱显示,氢通道深度可达0.5 /spl μ m /m,在半导体中产生受体钝化,可以通过低温退火完全消除。通过对多量子阱结构的低温光致发光测量表明,在覆盖势垒蚀刻到几nm之前,RIE过程对量子阱的光致发光性能没有显著影响。根据这些测量结果,提出了蚀刻半导体表面的损伤模型。通过分析表面泄漏电流,对RIE蚀刻InGaAs/InP台面pin二极管的侧壁损伤进行了表征。此外,还分析了不同蚀刻后处理对漏电流的影响。通过优化的CH/sub 4//H/sub 2//Ar-RIE工艺,可以制造出暗电流密度低至1.8/spl倍/10/sup -5/ A cm/sup -2/(偏置电压为-5 V)的pin -光电二极管,与已发表的最佳湿蚀刻台面pin -光电二极管相当。
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Surface- and sidewall-damage of InP-based optoelectronic devices during reactive ion etching using CH/sub 4//H/sub 2/
Systematic investigations are performed on the effect of reactive ion etching (RIE) using CH/sub 4//H/sub 2/ based gases on InP based semiconductors. From rutherford backscattering analysis a strong dependence of crystalline damage on process parameters is found leading to a damaged region of less than 3 nm for an optimized process. Capacitance voltage profiling shows the effect of hydrogen channeling up to 0.5 /spl mu/m deep into the semiconductor creating acceptor passivation which can be completely removed by annealing at low temperature. Using low temperature photoluminescence measurements on multiquantumwell structures, it is shown that the RIE process does not affect photoluminescence properties of quantum wells remarkably until the covering barrier is etched down to few nm. From these measurements a damage model of the etched semiconductor surface is presented. Sidewall damage of RIE etched InGaAs/InP Mesa-PIN-diodes is characterized by analyzing surface leakage currents. Furthermore, effects of different post-etch treatments on leakage currents are shown. By an optimized CH/sub 4//H/sub 2//Ar-RIE process PIN-photodiodes are fabricated with dark current densities as low as 1.8/spl times/10/sup -5/ A cm/sup -2/ (bias voltage is -5 V) which are comparable to the best published wet etched Mesa-PIN-photodiodes.
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