一种用于全差分ADC的低功耗驱动放大器

Sagnik Bhar, Annapurna Mondal, S. Srimani, I. Hatai, Subhajit Das, K. Ghosh, H. Rahaman
{"title":"一种用于全差分ADC的低功耗驱动放大器","authors":"Sagnik Bhar, Annapurna Mondal, S. Srimani, I. Hatai, Subhajit Das, K. Ghosh, H. Rahaman","doi":"10.1109/ISDCS.2019.8719267","DOIUrl":null,"url":null,"abstract":"A driver circuit of an analog-to-digital converter (ADC) is one of the critical parts which influences the transient response, frequency response and the noise floor of the system. To satisfy the accuracy and speed requirements, a modified differential difference amplifier (DDA) Common Mode Feedback (CMFB) circuit is designed along with a folded cascode op-amp with a supply voltage of 1. 8V. The entire system is designed in CADENCE Virtuoso using 180nm technology library. Different parametric and statistical simulations have been performed to test its viability under the influence of mismatches and variations of different process parameters and temperature.","PeriodicalId":293660,"journal":{"name":"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A low power driver amplifier for Fully Differential ADC\",\"authors\":\"Sagnik Bhar, Annapurna Mondal, S. Srimani, I. Hatai, Subhajit Das, K. Ghosh, H. Rahaman\",\"doi\":\"10.1109/ISDCS.2019.8719267\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A driver circuit of an analog-to-digital converter (ADC) is one of the critical parts which influences the transient response, frequency response and the noise floor of the system. To satisfy the accuracy and speed requirements, a modified differential difference amplifier (DDA) Common Mode Feedback (CMFB) circuit is designed along with a folded cascode op-amp with a supply voltage of 1. 8V. The entire system is designed in CADENCE Virtuoso using 180nm technology library. Different parametric and statistical simulations have been performed to test its viability under the influence of mismatches and variations of different process parameters and temperature.\",\"PeriodicalId\":293660,\"journal\":{\"name\":\"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISDCS.2019.8719267\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISDCS.2019.8719267","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

模数转换器(ADC)的驱动电路是影响系统瞬态响应、频率响应和本底噪声的关键部件之一。为了满足精度和速度要求,设计了一种改进的差分放大器(DDA)共模反馈(CMFB)电路和一个电源电压为1的折叠级联运放。8 v。整个系统采用CADENCE Virtuoso设计,采用180nm技术库。通过不同的参数模拟和统计模拟,验证了该方法在不同工艺参数和温度的不匹配和变化影响下的可行性。
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A low power driver amplifier for Fully Differential ADC
A driver circuit of an analog-to-digital converter (ADC) is one of the critical parts which influences the transient response, frequency response and the noise floor of the system. To satisfy the accuracy and speed requirements, a modified differential difference amplifier (DDA) Common Mode Feedback (CMFB) circuit is designed along with a folded cascode op-amp with a supply voltage of 1. 8V. The entire system is designed in CADENCE Virtuoso using 180nm technology library. Different parametric and statistical simulations have been performed to test its viability under the influence of mismatches and variations of different process parameters and temperature.
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