先进的双栅全耗尽绝缘体上硅(DG-FDSOI)器件及其对电路设计和电源管理的影响

T. Dao
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引用次数: 5

摘要

包括漏电流在内的功耗正成为VLSI中最重要的限制因素之一,特别是在65nm以下的技术中。虽然技术在规模上面临着多重挑战,但基于两个传统上分离的技术领域-技术和设计之间的合作,电路和系统设计技术在降低功耗和泄漏电流方面取得了成功的发展。本文讨论了DG-FDSOI技术的分离门接入能力对支持这些类型的合作技术的好处,以及对利用该技术的电路设计的影响。
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Advanced double-gate fully-depleted silicon-on-insulator (DG-FDSOI) device and device impact on circuit design & power management
Power consumption including leakage current is becoming one of the most important limiting factors in VLSI, especially in the sub-65nm technologies. While technologies are facing multiple challenges in scaling, there have been successful developments on reduction of power consumption and leakage current in circuit and system design techniques based on the cooperation between two traditionally separated technical fields - technology and design. The benefits of separate gate access capability of DG-FDSOI technology on supporting these kinds of cooperation techniques have been addressed together with the impact on circuit designs which take advantages of this technology.
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