使用基于阵列的表征电路的工艺窗口和器件变化评估

C. Tabery, M. Craig, G. Burbach, B. Wagner, S. McGowan, P. Etter, S. Roling, C. Haidinyak, E. Ehrichs
{"title":"使用基于阵列的表征电路的工艺窗口和器件变化评估","authors":"C. Tabery, M. Craig, G. Burbach, B. Wagner, S. McGowan, P. Etter, S. Roling, C. Haidinyak, E. Ehrichs","doi":"10.1109/ISQED.2006.107","DOIUrl":null,"url":null,"abstract":"Highly customizable and scaleable scribe-based circuits have been demonstrated as effective tools for gathering process window response curves and variations data not easily obtained through standard electrical test structure approaches or inline characterization. This work demonstrates the feasibility of using these types of circuits in design rule definition, mask validation, lithography margining, and OPC qualification and refinement. Finally, given their small form factors, they are easily adopted in high-volume manufacturing environments as process monitoring tools","PeriodicalId":138839,"journal":{"name":"7th International Symposium on Quality Electronic Design (ISQED'06)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Process window and device variations evaluation using array-based characterization circuits\",\"authors\":\"C. Tabery, M. Craig, G. Burbach, B. Wagner, S. McGowan, P. Etter, S. Roling, C. Haidinyak, E. Ehrichs\",\"doi\":\"10.1109/ISQED.2006.107\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Highly customizable and scaleable scribe-based circuits have been demonstrated as effective tools for gathering process window response curves and variations data not easily obtained through standard electrical test structure approaches or inline characterization. This work demonstrates the feasibility of using these types of circuits in design rule definition, mask validation, lithography margining, and OPC qualification and refinement. Finally, given their small form factors, they are easily adopted in high-volume manufacturing environments as process monitoring tools\",\"PeriodicalId\":138839,\"journal\":{\"name\":\"7th International Symposium on Quality Electronic Design (ISQED'06)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-03-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"7th International Symposium on Quality Electronic Design (ISQED'06)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2006.107\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th International Symposium on Quality Electronic Design (ISQED'06)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2006.107","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14

摘要

高度可定制和可扩展的基于刻写的电路已被证明是收集过程窗口响应曲线和变化数据的有效工具,这些数据不易通过标准电气测试结构方法或在线表征获得。这项工作证明了在设计规则定义、掩模验证、光刻边缘以及OPC鉴定和改进中使用这些类型电路的可行性。最后,考虑到它们的小尺寸,它们很容易在大批量制造环境中被用作过程监控工具
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Process window and device variations evaluation using array-based characterization circuits
Highly customizable and scaleable scribe-based circuits have been demonstrated as effective tools for gathering process window response curves and variations data not easily obtained through standard electrical test structure approaches or inline characterization. This work demonstrates the feasibility of using these types of circuits in design rule definition, mask validation, lithography margining, and OPC qualification and refinement. Finally, given their small form factors, they are easily adopted in high-volume manufacturing environments as process monitoring tools
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