W. Chakraborty, Uma Sharma, S. Datta, S. Mahapatra
{"title":"Cryo-CMOS中的热载流子降解","authors":"W. Chakraborty, Uma Sharma, S. Datta, S. Mahapatra","doi":"10.1109/IRPS45951.2020.9129312","DOIUrl":null,"url":null,"abstract":"28nm Gate First High-K Metal Gate (GF-HKMG) technology is analyzed for Hot-Carrier Degradation (HCD) under varying gate/drain (V<inf>G</inf>/V<inf>D</inf>) bias and temperature (T: 300K to 77K). A compact model is used to partition measured threshold voltage shift (ΔV<inf>T</inf>) into interface trap generation due to pure HCD (ΔV<inf>IT-HC</inf>), Bias Temperature Instability (BTI, ΔV<inf>IT-BT</inf>), and electron/hole trapping (ΔV<inf>ET</inf>/ΔV<inf>HT</inf>) subcomponents. The relative importance of the subcomponents is analyzed for varying T. Although pure HCD dominates under Cryo-CMOS operation, the T dependence is shown to be different for Si NMOS and SiGe PMOS FETs. Finally, the impact on the circuit (RO: Ring Oscillator) operation is analyzed.","PeriodicalId":116002,"journal":{"name":"2020 IEEE International Reliability Physics Symposium (IRPS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Hot Carrier Degradation in Cryo-CMOS\",\"authors\":\"W. Chakraborty, Uma Sharma, S. Datta, S. Mahapatra\",\"doi\":\"10.1109/IRPS45951.2020.9129312\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"28nm Gate First High-K Metal Gate (GF-HKMG) technology is analyzed for Hot-Carrier Degradation (HCD) under varying gate/drain (V<inf>G</inf>/V<inf>D</inf>) bias and temperature (T: 300K to 77K). A compact model is used to partition measured threshold voltage shift (ΔV<inf>T</inf>) into interface trap generation due to pure HCD (ΔV<inf>IT-HC</inf>), Bias Temperature Instability (BTI, ΔV<inf>IT-BT</inf>), and electron/hole trapping (ΔV<inf>ET</inf>/ΔV<inf>HT</inf>) subcomponents. The relative importance of the subcomponents is analyzed for varying T. Although pure HCD dominates under Cryo-CMOS operation, the T dependence is shown to be different for Si NMOS and SiGe PMOS FETs. Finally, the impact on the circuit (RO: Ring Oscillator) operation is analyzed.\",\"PeriodicalId\":116002,\"journal\":{\"name\":\"2020 IEEE International Reliability Physics Symposium (IRPS)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE International Reliability Physics Symposium (IRPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS45951.2020.9129312\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Reliability Physics Symposium (IRPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS45951.2020.9129312","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
摘要
分析了28nm Gate First High-K Metal Gate (GF-HKMG)技术在不同栅极/漏极(VG/VD)偏置和温度(T: 300K至77K)下的热载流子降解(HCD)。使用紧凑的模型将测量的阈值电压位移(ΔVT)划分为由于纯HCD (ΔVIT-HC)，偏置温度不稳定性(BTI， ΔVIT-BT)和电子/空穴捕获(ΔVET/ΔVHT)子组件而产生的界面陷阱。虽然纯HCD在cro - cmos操作下占主导地位，但对于Si NMOS和SiGe PMOS fet, T依赖性有所不同。最后，分析了对环形振荡器(RO: Ring Oscillator)工作的影响。
28nm Gate First High-K Metal Gate (GF-HKMG) technology is analyzed for Hot-Carrier Degradation (HCD) under varying gate/drain (VG/VD) bias and temperature (T: 300K to 77K). A compact model is used to partition measured threshold voltage shift (ΔVT) into interface trap generation due to pure HCD (ΔVIT-HC), Bias Temperature Instability (BTI, ΔVIT-BT), and electron/hole trapping (ΔVET/ΔVHT) subcomponents. The relative importance of the subcomponents is analyzed for varying T. Although pure HCD dominates under Cryo-CMOS operation, the T dependence is shown to be different for Si NMOS and SiGe PMOS FETs. Finally, the impact on the circuit (RO: Ring Oscillator) operation is analyzed.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
